Imagers, such as complementary metal oxide semiconductor (CMOS) imagers, are commonly used in photo-imaging applications. A typical imager includes a focal plane array of pixels. Each of the cells includes a photoconversion device or photosensor such as, for example, a photogate, photoconductor, or photodiode, for generating and accumulating photo-generated charge in a portion of the substrate of the array. A readout circuit is connected to each pixel and includes at least an output transistor, which receives photo-generated charges from a doped diffusion region and produces an output signal that is read-out through a pixel access transistor.
CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. Nos. 6,140,630, 6,376,868, 6,310,366, 6,326,652, 6,204,524, and U.S. Pat. No. 6,333,205, all of which are assigned to Micron Technology, Inc. The disclosures of each of the forgoing are hereby incorporated by reference herein in their entirety.
FIG. 1 illustrates a typical four transistor pixel 50 utilized in an imager, such as a CMOS imager. The pixel 50 includes a photosensor 52 (e.g., photodiode, photogate, etc.), a storage node configured as a floating diffusion region N, transfer transistor 54, reset transistor 56, source follower transistor 58 and row select transistor 60. The photosensor 52 is connected to the floating diffusion region N by the transfer transistor 54 when the transfer transistor 54 is activated by a transfer control signal TX. The reset transistor 56 is connected between the floating diffusion region N and an array pixel supply voltage VAA. A reset control signal RESET is used to activate the reset transistor 56, which resets the floating diffusion region N to a known state as is known in the art.
The source follower transistor 58 has its gate connected to the floating diffusion region N and is connected between the array pixel supply voltage VAA and the row select transistor 60. The source follower transistor 58 converts the charge stored at the floating diffusion region N into an electrical output voltage signal. The row select transistor 60 is controllable by a row select signal ROW for selectively outputting the output voltage signal OUT from the source follower transistor 58. For each pixel 50, two output signals are conventionally generated, one being a reset signal Vrst generated after the floating diffusion region N is read, the other being an image signal Vsig generated after charges are transferred from the photosensor 52 to the floating diffusion region N.
FIG. 2 shows an imager 200 that includes an array 230 of pixels (such as the pixel 50 illustrated in FIG. 1) and a timing and control circuit 232. The timing and control circuit 232 provides timing and control signals for enabling the reading out of signals from pixels of the array 230 in a manner commonly known to those skilled in the art. The array 230 has dimensions of M rows by N columns of pixels, with the size of the array 230 depending on a particular application.
Signals from the imager 200 are typically read out a row at a time using a column parallel readout architecture. The timing and control circuit 232 selects a particular row of pixels in the array 230 by controlling the operation of a row addressing circuit 234 and row drivers 240. Signals stored in the selected row of pixels are provided to a readout circuit 242 in the manner described above. The signal read from each of the columns is then read out sequentially using a column addressing circuit 244. Differential pixel signals (Vrst, Vsig) corresponding to the pixel reset signal and image pixel signal are provided as respective outputs Vout1, Vout2 of the readout circuit 242.
The pixels 50, of pixel array 230, have a characteristic dynamic range. Dynamic range refers to the range of incident light that can be accommodated by a pixel in a single image frame. It is desirable to have pixels with a high dynamic range to image scenes that generate high dynamic range incident signals, such as indoor rooms with windows to the outside, outdoor scenes with mixed shadows and bright sunshine, and night-time scenes combining artificial lighting and shadows.
The dynamic range for a pixel is commonly defined as the ratio of its largest non-saturating signal to the standard deviation of its noise under dark conditions. The dynamic range is limited on an upper end by the charge saturation level of the pixel photosensor, and on a lower end by noise imposed limitations and/or quantization limits of the analog-to-digital converter used to produce a digital signal from analog pixel signals. When the dynamic range of a pixel is too small to accommodate the variations in light intensities of the imaged scene, e.g. by having a low saturation level, image distortion occurs.
One approach to increasing dynamic range is to provide structures to increase dynamic range, which includes structures for signal companding, multiple signal storage, and signal controlled reset. Companding involves compressing and subsequently expanding a signal to increase the dynamic range, but suffers from drawbacks such as requiring a non-linear output that hampers subsequent processing and causes increased pixel fixed pattern noise (FPN), a dip in the signal to noise ratio (SNR) at the knee point, and low contrast at high brightness. Structures providing multiple signal storage and signal controlled reset may not be practical because they require an increase in die area due to additional column circuitry.
Another approach to increase dynamic range is to use multiple image captures with different integration times. Dual capture, for example, is relatively simple to implement, but suffers from an SNR dip at the knee point of the collected charge relative to output signal. A multiple capture approach that requires more than two image captures is quite difficult to implement and requires high speed non-destructive readout along with on-chip memory and additional column circuitry.